Dielectric materials are used in the formation of semiconductor devices to provide insulation between electrical components. As semiconductor device dimensions decrease, electrical components such as interconnects must be formed closer together. This unfortunately increases the capacitance between components with the resulting interference and crosstalk degrading device performance. To address this issue, dielectric materials with lower dielectric constants (i.e., low-k dielectric materials) are being used to provide better insulation between electrical components.
Low-k dielectric materials such as carbon doped oxide are prone to cracking due to their tensile stress properties. This cracking typically occurs during the integration or formation of interconnect layers, as well as during packaging processes for the semiconductor device. One conventional solution for minimizing cracking is reducing the dielectric film thickness to below the cracking threshold. This method, however, reduces the insulative properties of the dielectric film. Another solution is improving the mechanical strength and cracking resistance of the dielectric film by increasing the density of the film. Unfortunately, this is done at the expense of increasing the dielectric constant of the film, which again reduces its insulative properties. Yet another solution is the addition of a compressive etch-stop layer, but the overall capacitance tends to increase and the interface between the etch-stop layer and the dielectric film is a source of delamaination.